![]() |
NHS31xx SW API
|
This driver select the peripheral IO (PIO) pin function of digital pins (e.g. PIO or I2C clock) and analog pins. The characteristics include peripheral function, analog pins functionality, GPIO and its electrical modes (e.g. pull-up or pull-down), the low-pass input filter modes, and current drive output mode of all pins. In addition, the I2C-bus pins can be configured for different I2C-bus modes.
The pin function determine the peripheral function of a pin, and with that the direction. For example, if the pins are configured as GPIO pins, the Chip_GPIO_SetPortDIR of GPIO driver determine whether the pin is configured as an input or output. For other peripheral function, the pin direction is controlled automatically depending on the pin's functionality.
The pin resistor modes allow enabling of on-chip pull-up or pull-down resistors or to select the repeater mode. The repeater mode enables the pull-up resistor if the pin is at a logic HIGH and enables the pull-down resistor if the pin is at a logic LOW. This causes the pin to retain its last known state if it is configured as an input and is not driven externally. The state retention is not applicable to the Deep power-down mode. Repeater mode may typically be used to prevent a pin from floating (and potentially using significant power if it floats to an indeterminate state) if it is temporarily not driven.
Data Structures | |
struct | NSS_IOCON_T |
Macros | |
#define | IOCON_FUNC_0 (0x0) |
#define | IOCON_FUNC_1 (0x1) |
#define | IOCON_FUNC_2 (0x2) |
#define | IOCON_FUNC_3 (0x3) |
#define | IOCON_FUNC_4 (0x4) |
#define | IOCON_FUNC_5 (0x5) |
#define | IOCON_FUNC_6 (0x6) |
#define | IOCON_FUNC_7 (0x7) |
#define | IOCON_FUNC_MASK (0x7) |
#define | IOCON_RMODE_INACT (0x0 << 3) |
#define | IOCON_RMODE_PULLDOWN (0x1 << 3) |
#define | IOCON_RMODE_PULLUP (0x2 << 3) |
#define | IOCON_RMODE_REPEATER (0x3 << 3) |
#define | IOCON_RMODE_MASK (0x3 << 3) |
#define | IOCON_LPF_DISABLE (0x0 << 5) |
#define | IOCON_LPF_ENABLE (0x1 << 5) |
#define | IOCON_LPF_MASK (0x1 << 5) |
#define | IOCON_CDRIVE_FIXEDVOLTAGE (0x0 << 6) |
#define | IOCON_CDRIVE_PROGRAMMABLECURRENT (0x1 << 6) |
#define | IOCON_CDRIVE_MASK (0x1 << 6) |
#define | IOCON_DDRIVE_HIGH (0x0 << 7) |
#define | IOCON_DDRIVE_ULTRAHIGH (0x1 << 7) |
#define | IOCON_DDRIVE_MASK (0x1 << 7) |
#define | IOCON_I2CMODE_STDFAST (0x0 << 8) |
#define | IOCON_I2CMODE_PIO (0x1 << 8) |
#define | IOCON_I2CMODE_MASK (0x1 << 8) |
#define | IOCON_ILO_VAL(x) (((x) & 0xFF) << 8 ) |
#define | IOCON_IHI_VAL(x) (((x) & 0xFF) << 16) |
#define | IOCON_ILO_MASK (0xFF << 8) |
#define | IOCON_IHI_MASK (0xFF << 16) |
Enumerations | |
enum | IOCON_PIN_T { IOCON_PIO0_0 = (0x000 >> 2), IOCON_PIO0_1 = (0x004 >> 2), IOCON_PIO0_2 = (0x008 >> 2), IOCON_PIO0_3 = (0x00C >> 2), IOCON_PIO0_4 = (0x010 >> 2), IOCON_PIO0_5 = (0x014 >> 2), IOCON_PIO0_6 = (0x018 >> 2), IOCON_PIO0_7 = (0x01C >> 2), IOCON_PIO0_8 = (0x020 >> 2), IOCON_PIO0_9 = (0x024 >> 2), IOCON_PIO0_10 = (0x028 >> 2), IOCON_PIO0_11 = (0x02C >> 2), IOCON_ANA0_0 = (0x030 >> 2), IOCON_ANA0_1 = (0x034 >> 2), IOCON_ANA0_2 = (0x038 >> 2), IOCON_ANA0_3 = (0x03C >> 2), IOCON_ANA0_4 = (0x040 >> 2), IOCON_ANA0_5 = (0x044 >> 2), IOCON_ANA0_6 = (0x048 >> 2), IOCON_ANA0_7 = (0x04C >> 2), IOCON_ANA0_8 = (0x050 >> 2), IOCON_ANA0_9 = (0x054 >> 2), IOCON_ANA0_10 = (0x058 >> 2), IOCON_ANA0_11 = (0x05C >> 2) } |
enum | IOCON_ANABUS_T { IOCON_ANABUS_EXT0 = (1 << 0), IOCON_ANABUS_EXT1 = (1 << 1), IOCON_ANABUS_EXT2 = (1 << 2), IOCON_ANABUS_EXT3 = (1 << 3), IOCON_ANABUS_EXT4 = (1 << 4), IOCON_ANABUS_EXT5 = (1 << 5), IOCON_ANABUS_EXT6 = (1 << 6), IOCON_ANABUS_EXT7 = (1 << 7), IOCON_ANABUS_EXT8 = (1 << 8), IOCON_ANABUS_EXT9 = (1 << 9), IOCON_ANABUS_EXT10 = (1 << 10), IOCON_ANABUS_EXT11 = (1 << 11), IOCON_ANABUS_INT0 = (1 << 12), IOCON_ANABUS_INT1 = (1 << 13), IOCON_ANABUS_INT2 = (1 << 14), IOCON_ANABUS_INT3 = (1 << 15), IOCON_ANABUS_INT4 = (1 << 16), IOCON_ANABUS_INT5 = (1 << 17), IOCON_ANABUS_INT6 = (1 << 18), IOCON_ANABUS_INT7 = (1 << 19), IOCON_ANABUS_INT8 = (1 << 20), IOCON_ANABUS_INT9 = (1 << 21), IOCON_ANABUS_INT10 = (1 << 22), IOCON_ANABUS_INT11 = (1 << 23), IOCON_ANABUS_INT12 = (1 << 24), IOCON_ANABUS_INT13 = (1 << 25), IOCON_ANABUS_INT14 = (1 << 26), IOCON_ANABUS_INT15 = (1 << 27) } |
Functions | |
void | Chip_IOCON_Init (NSS_IOCON_T *pIOCON) |
void | Chip_IOCON_DeInit (NSS_IOCON_T *pIOCON) |
void | Chip_IOCON_SetPinConfig (NSS_IOCON_T *pIOCON, IOCON_PIN_T pin, int config) |
int | Chip_IOCON_GetPinConfig (NSS_IOCON_T *pIOCON, IOCON_PIN_T pin) |
void | Chip_IOCON_SetAnabusGrounded (NSS_IOCON_T *pIOCON, IOCON_ANABUS_T bitvector) |
IOCON_ANABUS_T | Chip_IOCON_GetAnabusGrounded (NSS_IOCON_T *pIOCON) |
void | Chip_IOCON_GroundAnabus (NSS_IOCON_T *pIOCON, IOCON_ANABUS_T bitvector) |
void | Chip_IOCON_UngroundAnabus (NSS_IOCON_T *pIOCON, IOCON_ANABUS_T bitvector) |
struct NSS_IOCON_T |
#define IOCON_FUNC_0 (0x0) |
Selects pin function 0
#define IOCON_FUNC_1 (0x1) |
Selects pin function 1
#define IOCON_FUNC_2 (0x2) |
Selects pin function 2
#define IOCON_FUNC_3 (0x3) |
Selects pin function 3
#define IOCON_FUNC_4 (0x4) |
Selects pin function 4
#define IOCON_FUNC_5 (0x5) |
Selects pin function 5
#define IOCON_FUNC_6 (0x6) |
Selects pin function 6
#define IOCON_FUNC_7 (0x7) |
Selects pin function 7
#define IOCON_FUNC_MASK (0x7) |
Pin function mask
#define IOCON_RMODE_INACT (0x0 << 3) |
No addition resistor pin function
#define IOCON_RMODE_PULLDOWN (0x1 << 3) |
Selects pull-down resistor function
#define IOCON_RMODE_PULLUP (0x2 << 3) |
Selects pull-up resistor function
#define IOCON_RMODE_REPEATER (0x3 << 3) |
Selects pin repeater function
#define IOCON_RMODE_MASK (0x3 << 3) |
Selects pin resistor mode mask
#define IOCON_LPF_DISABLE (0x0 << 5) |
Disables Low pass filter
#define IOCON_LPF_ENABLE (0x1 << 5) |
Enables Low pass filter
#define IOCON_LPF_MASK (0x1 << 5) |
Selects pin LPF mask
#define IOCON_CDRIVE_FIXEDVOLTAGE (0x0 << 6) |
Programmable current driver - Fixed Voltage driver
#define IOCON_CDRIVE_PROGRAMMABLECURRENT (0x1 << 6) |
Programmable current driver - Programmable current driver
#define IOCON_CDRIVE_MASK (0x1 << 6) |
Selects pin current drive mask
#define IOCON_DDRIVE_HIGH (0x0 << 7) |
Digital drive strength - High Drive (20mA drive at 3.1V supply)
#define IOCON_DDRIVE_ULTRAHIGH (0x1 << 7) |
Digital drive strength - Ultra-high drive (20mA drive at 2.4V supply)
#define IOCON_DDRIVE_MASK (0x1 << 7) |
Selects pin digital drive mask
#define IOCON_I2CMODE_STDFAST (0x0 << 8) |
I2C Standard mode or fast-mode
#define IOCON_I2CMODE_PIO (0x1 << 8) |
Standard I/O functionality
#define IOCON_I2CMODE_MASK (0x1 << 8) |
Selects pin I2C mode mask
#define IOCON_ILO_VAL | ( | x | ) | (((x) & 0xFF) << 8 ) |
Set CDRIVE Low Value
#define IOCON_IHI_VAL | ( | x | ) | (((x) & 0xFF) << 16) |
Set CDRIVE High value
#define IOCON_ILO_MASK (0xFF << 8) |
Set CDRIVE Low mask
#define IOCON_IHI_MASK (0xFF << 16) |
Set CDRIVE High mask
enum IOCON_PIN_T |
I/O Pins Definitions
enum IOCON_ANABUS_T |
Analog Bus Definitions
void Chip_IOCON_Init | ( | NSS_IOCON_T * | pIOCON | ) |
Initialize IOCON block
pIOCON | : The base address of the IOCON peripheral on the chip |
void Chip_IOCON_DeInit | ( | NSS_IOCON_T * | pIOCON | ) |
De-Initialize IOCON block
pIOCON | : The base address of the IOCON peripheral on the chip |
void Chip_IOCON_SetPinConfig | ( | NSS_IOCON_T * | pIOCON, |
IOCON_PIN_T | pin, | ||
int | config | ||
) |
Sets I/O pin configuration
pIOCON | : The base address of the IOCON peripheral on the chip |
pin | : GPIO pin to configure |
config | : I/O pin configuration. Use or'ed values defined by IOCON_* macros |
int Chip_IOCON_GetPinConfig | ( | NSS_IOCON_T * | pIOCON, |
IOCON_PIN_T | pin | ||
) |
Gets I/O pin configuration
pIOCON | : The base address of the IOCON peripheral on the chip |
pin | : GPIO pin to retrieve the configuration from |
void Chip_IOCON_SetAnabusGrounded | ( | NSS_IOCON_T * | pIOCON, |
IOCON_ANABUS_T | bitvector | ||
) |
Grounds/UnGrounds the analog bus(es) described in IOCON_ANABUS_T
pIOCON | : The base address of the IOCON peripheral on the chip |
bitvector | : Bitvector of the analog bus(es) which are to be grounded/ungrounded |
IOCON_ANABUS_T Chip_IOCON_GetAnabusGrounded | ( | NSS_IOCON_T * | pIOCON | ) |
Retrieves a bitvector stating the grounded/ungrounded analog buses described in IOCON_ANABUS_T
pIOCON | : The base address of the IOCON peripheral on the chip |
void Chip_IOCON_GroundAnabus | ( | NSS_IOCON_T * | pIOCON, |
IOCON_ANABUS_T | bitvector | ||
) |
Grounds the required analog bus(es).
pIOCON | : The base address of the IOCON peripheral on the chip |
bitvector | : Bitvector of the analog bus(es) which needs to be grounded |
bitvector
are changed. All the others are left untouched. void Chip_IOCON_UngroundAnabus | ( | NSS_IOCON_T * | pIOCON, |
IOCON_ANABUS_T | bitvector | ||
) |
Ungrounds the required analog bus(es).
pIOCON | : The base address of the IOCON peripheral on the chip |
bitvector | : Bitvector of the analog bus(es) which needs to be ungrounded |
bitvector
are changed. All the others are left untouched.