12 #ifndef __TIMER_NSS_H_ 13 #define __TIMER_NSS_H_ 283 typedef struct NSS_TIMER_S {
299 __I uint32_t RESERVED0[5];
302 __I uint32_t RESERVED1[13];
307 typedef enum IP_TIMER_PIN_MATCH_STATE {
315 typedef enum NSS_TIMER_MATCH_OUTPUT_MODE {
321 #define TIMER_IR_CLR(n) (1u << (n)) 324 #define TIMER_MATCH_INT(n) ((1u << (n)) & 0x0F) 327 #define TIMER_ENABLE ((1u << 0)) 329 #define TIMER_RESET ((1u << 1)) 332 #define TIMER_INT_ON_MATCH(n) (1u << ((n) * 3)) 334 #define TIMER_RESET_ON_MATCH(n) (1u << (((n) * 3) + 1)) 336 #define TIMER_STOP_ON_MATCH(n) (1u << (((n) * 3) + 2)) 436 pTMR->
MR[matchnum] = matchval;
static void Chip_TIMER_MatchEnableInt(NSS_TIMER_T *pTMR, int8_t matchnum)
Definition: timer_nss.h:451
__IO uint32_t TC
Definition: timer_nss.h:288
static void Chip_TIMER_SetMatch(NSS_TIMER_T *pTMR, int8_t matchnum, uint32_t matchval)
Definition: timer_nss.h:434
Definition: timer_nss.h:283
#define TIMER_MATCH_INT(n)
Definition: timer_nss.h:324
__IO uint32_t TCR
Definition: timer_nss.h:286
void Chip_TIMER_ExtMatchControlSet(NSS_TIMER_T *pTMR, int8_t initial_state, TIMER_PIN_MATCH_STATE_T matchState, int8_t matchnum)
__IO uint32_t IR
Definition: timer_nss.h:284
#define TIMER_ENABLE
Definition: timer_nss.h:327
static void Chip_TIMER_ResetOnMatchEnable(NSS_TIMER_T *pTMR, int8_t matchnum)
Definition: timer_nss.h:471
static bool Chip_TIMER_MatchPending(NSS_TIMER_T *pTMR, int8_t matchnum)
Definition: timer_nss.h:358
CLOCK_PERIPHERAL_T
Definition: clock_nss.h:65
__IO uint32_t PR
Definition: timer_nss.h:290
void Chip_TIMER_SetMatchOutputMode(NSS_TIMER_T *pTMR, int matchnum, NSS_TIMER_MATCH_OUTPUT_MODE_T mode)
#define TIMER_STOP_ON_MATCH(n)
Definition: timer_nss.h:336
Definition: timer_nss.h:309
static void Chip_TIMER_MatchDisableInt(NSS_TIMER_T *pTMR, int8_t matchnum)
Definition: timer_nss.h:461
#define __IO
Definition: core_cm0plus.h:167
#define __I
Definition: core_cm0plus.h:164
#define TIMER_RESET_ON_MATCH(n)
Definition: timer_nss.h:334
void Chip_TIMER_Reset(NSS_TIMER_T *pTMR)
TIMER_PIN_MATCH_STATE_T
Definition: timer_nss.h:307
static uint32_t Chip_TIMER_ReadCount(NSS_TIMER_T *pTMR)
Definition: timer_nss.h:400
static void Chip_TIMER_Enable(NSS_TIMER_T *pTMR)
Definition: timer_nss.h:379
Definition: timer_nss.h:310
static uint32_t Chip_TIMER_ReadPrescale(NSS_TIMER_T *pTMR)
Definition: timer_nss.h:411
static void Chip_TIMER_ClearMatch(NSS_TIMER_T *pTMR, int8_t matchnum)
Definition: timer_nss.h:369
__IO uint32_t MR[4]
Definition: timer_nss.h:297
__IO uint32_t EMR
Definition: timer_nss.h:300
Definition: timer_nss.h:308
NSS_TIMER_MATCH_OUTPUT_MODE_T
Definition: timer_nss.h:315
NSS_TIMER_MATCH_OUTPUT_MODE_T Chip_TIMER_GetMatchOutputMode(NSS_TIMER_T *pTMR, int matchnum)
static void Chip_TIMER_ResetOnMatchDisable(NSS_TIMER_T *pTMR, int8_t matchnum)
Definition: timer_nss.h:481
#define TIMER_IR_CLR(n)
Definition: timer_nss.h:321
static void Chip_TIMER_Disable(NSS_TIMER_T *pTMR)
Definition: timer_nss.h:389
Definition: timer_nss.h:317
#define TIMER_INT_ON_MATCH(n)
Definition: timer_nss.h:332
void Chip_TIMER_Init(NSS_TIMER_T *pTMR, CLOCK_PERIPHERAL_T clk)
static void Chip_TIMER_PrescaleSet(NSS_TIMER_T *pTMR, uint32_t prescale)
Definition: timer_nss.h:422
__IO uint32_t PWMC
Definition: timer_nss.h:303
__IO uint32_t MCR
Definition: timer_nss.h:295
void Chip_TIMER_DeInit(NSS_TIMER_T *pTMR, CLOCK_PERIPHERAL_T clk)
static void Chip_TIMER_StopOnMatchDisable(NSS_TIMER_T *pTMR, int8_t matchnum)
Definition: timer_nss.h:502
static void Chip_TIMER_StopOnMatchEnable(NSS_TIMER_T *pTMR, int8_t matchnum)
Definition: timer_nss.h:491
__IO uint32_t PC
Definition: timer_nss.h:292
Definition: timer_nss.h:316
Definition: timer_nss.h:311