NHS31xx SW API
i2c_nss.h
1 /*
2  * Copyright 2014-2016,2018-2020 NXP
3  * This software is owned or controlled by NXP and may only be used strictly
4  * in accordance with the applicable license terms. By expressly accepting
5  * such terms or by downloading, installing, activating and/or otherwise using
6  * the software, you are agreeing that you have read, and that you agree to
7  * comply with and are bound by, such license terms. If you do not agree to
8  * be bound by the applicable license terms, then you may not retain, install,
9  * activate or otherwise use the software.
10  */
11 
12 #ifndef __I2C_NSS_H_
13 #define __I2C_NSS_H_
14 
112 typedef struct {
113  __IO uint32_t CONSET;
116  __I uint32_t STAT;
118  __IO uint32_t DAT;
120  __IO uint32_t ADR0;
123  __IO uint32_t SCLH;
124  __IO uint32_t SCLL;
126  __O uint32_t CONCLR;
129  __IO uint32_t MMCTRL;
130  __IO uint32_t ADR1;
133  __IO uint32_t ADR2;
136  __IO uint32_t ADR3;
139  __I uint32_t DATA_BUFFER;
142  __IO uint32_t MASK[4];
143 } NSS_I2C_T;
144 
146 typedef enum {
154 } I2C_SLAVE_ID;
155 
157 typedef enum {
163 } I2C_STATUS_T;
164 
169 typedef struct {
170  uint8_t slaveAddr;
171  const uint8_t *txBuff;
172  int txSz;
173  uint8_t *rxBuff;
174  int rxSz;
176 } I2C_XFER_T;
177 
179 typedef enum I2C_ID {
182 } I2C_ID_T;
183 
187 typedef enum {
194 } I2C_EVENT_T;
195 
200 
205 void Chip_I2C_Init(I2C_ID_T id);
206 
211 void Chip_I2C_DeInit(I2C_ID_T id);
212 
220 void Chip_I2C_SetClockRate(I2C_ID_T id, uint32_t clockrate);
221 
227 uint32_t Chip_I2C_GetClockRate(I2C_ID_T id);
228 
248 
257 int Chip_I2C_MasterSend(I2C_ID_T id, uint8_t slaveAddr, const uint8_t *buff, int len);
258 
270 int Chip_I2C_MasterCmdRead(I2C_ID_T id, uint8_t slaveAddr, uint8_t *cmdBuff, uint8_t *buff, int len);
271 
279 
289 
298 int Chip_I2C_MasterRead(I2C_ID_T id, uint8_t slaveAddr, uint8_t *buff, int len);
299 
307 
315 
323 
328 void Chip_I2C_Disable(I2C_ID_T id);
329 
338 
402 void Chip_I2C_SlaveSetup(I2C_ID_T id, I2C_SLAVE_ID sid, I2C_XFER_T *xfer, I2C_EVENTHANDLER_T event, uint8_t addrMask);
403 
409 
418 
419 #endif
void Chip_I2C_EventHandler(I2C_ID_T id, I2C_EVENT_T event)
I2C_STATUS_T status
Definition: i2c_nss.h:175
uint8_t * rxBuff
Definition: i2c_nss.h:173
I2C_SLAVE_ID
Definition: i2c_nss.h:146
int Chip_I2C_MasterCmdRead(I2C_ID_T id, uint8_t slaveAddr, uint8_t *cmdBuff, uint8_t *buff, int len)
int Chip_I2C_SetMasterEventHandler(I2C_ID_T id, I2C_EVENTHANDLER_T event)
__I uint32_t DATA_BUFFER
Definition: i2c_nss.h:139
I2C_STATUS_T Chip_I2C_MasterTransfer(I2C_ID_T id, I2C_XFER_T *xfer)
I2C_STATUS_T
Definition: i2c_nss.h:157
__IO uint32_t ADR1
Definition: i2c_nss.h:130
Definition: i2c_nss.h:193
I2C_EVENTHANDLER_T Chip_I2C_GetMasterEventHandler(I2C_ID_T id)
int txSz
Definition: i2c_nss.h:172
uint8_t slaveAddr
Definition: i2c_nss.h:170
__IO uint32_t ADR0
Definition: i2c_nss.h:120
Definition: i2c_nss.h:191
Definition: i2c_nss.h:149
I2C_ID_T
Definition: i2c_nss.h:179
#define __IO
Definition: core_cm0plus.h:167
__IO uint32_t CONSET
Definition: i2c_nss.h:113
#define __I
Definition: core_cm0plus.h:164
Definition: i2c_nss.h:190
Definition: i2c_nss.h:161
__IO uint32_t SCLL
Definition: i2c_nss.h:124
I2C_EVENT_T
Definition: i2c_nss.h:187
void Chip_I2C_EventHandlerPolling(I2C_ID_T id, I2C_EVENT_T event)
void(* I2C_EVENTHANDLER_T)(I2C_ID_T, I2C_EVENT_T)
Definition: i2c_nss.h:199
const uint8_t * txBuff
Definition: i2c_nss.h:171
__IO uint32_t MMCTRL
Definition: i2c_nss.h:129
void Chip_I2C_MasterStateHandler(I2C_ID_T id)
__IO uint32_t ADR3
Definition: i2c_nss.h:136
void Chip_I2C_DeInit(I2C_ID_T id)
int Chip_I2C_IsStateChanged(I2C_ID_T id)
Definition: i2c_nss.h:192
int Chip_I2C_MasterSend(I2C_ID_T id, uint8_t slaveAddr, const uint8_t *buff, int len)
void Chip_I2C_SlaveStateHandler(I2C_ID_T id)
Definition: i2c_nss.h:151
__I uint32_t STAT
Definition: i2c_nss.h:116
uint32_t Chip_I2C_GetClockRate(I2C_ID_T id)
Definition: i2c_nss.h:160
void Chip_I2C_SlaveSetup(I2C_ID_T id, I2C_SLAVE_ID sid, I2C_XFER_T *xfer, I2C_EVENTHANDLER_T event, uint8_t addrMask)
Definition: i2c_nss.h:158
#define __O
Definition: core_cm0plus.h:166
Definition: i2c_nss.h:189
int rxSz
Definition: i2c_nss.h:174
Definition: i2c_nss.h:152
Definition: i2c_nss.h:147
Definition: i2c_nss.h:181
Definition: i2c_nss.h:188
__IO uint32_t DAT
Definition: i2c_nss.h:118
Definition: i2c_nss.h:159
void Chip_I2C_Disable(I2C_ID_T id)
__IO uint32_t ADR2
Definition: i2c_nss.h:133
__O uint32_t CONCLR
Definition: i2c_nss.h:126
int Chip_I2C_MasterRead(I2C_ID_T id, uint8_t slaveAddr, uint8_t *buff, int len)
__IO uint32_t SCLH
Definition: i2c_nss.h:123
Definition: i2c_nss.h:150
Definition: i2c_nss.h:148
void Chip_I2C_SetClockRate(I2C_ID_T id, uint32_t clockrate)
Definition: i2c_nss.h:162
void Chip_I2C_Init(I2C_ID_T id)
Definition: i2c_nss.h:180
Definition: i2c_nss.h:112
Definition: i2c_nss.h:169
int Chip_I2C_IsMasterActive(I2C_ID_T id)