NHS31xx SW API
cmsis.h
1 /*
2  * Copyright 2014-2017 NXP
3  * This software is owned or controlled by NXP and may only be used strictly
4  * in accordance with the applicable license terms. By expressly accepting
5  * such terms or by downloading, installing, activating and/or otherwise using
6  * the software, you are agreeing that you have read, and that you agree to
7  * comply with and are bound by, such license terms. If you do not agree to
8  * be bound by the applicable license terms, then you may not retain, install,
9  * activate or otherwise use the software.
10  */
11 
12 #ifndef __CMSIS_H_
13 #define __CMSIS_H_
14 
23 // The following definitions configure ARM's cmsis.
24 // We need to define them, before including it (core_cm0plus.h)
25 #if defined(__ARMCC_VERSION)
26  // Kill warning "#pragma push with no matching #pragma pop"
27  #pragma diag_suppress 2525
28  #pragma push
29  #pragma anon_unions
30 #elif defined(__CWCC__)
31  #pragma push
32  #pragma cpp_extensions on
33 #elif defined(__GNUC__)
34  // anonymous unions are enabled by default
35 #elif defined(__IAR_SYSTEMS_ICC__)
36  // #pragma push // FIXME not usable for IAR
37  #pragma language=extended
38 #else
39  #error Not supported compiler type
40 #endif
41 
42 #if !defined(CORE_M0PLUS)
43  #error Please #define CORE_M0PLUS
44 #endif
45 
46 /* Configuration of the Cortex-M0+ Processor and Core Peripherals */
48 #define __CM0_REV 0x0000
49 
51 #define __MPU_PRESENT 0
52 
54 #define __NVIC_PRIO_BITS 2
55 
57 #define __Vendor_SysTickConfig 0
58 
60 typedef enum {
61 
62  /* Cortex-M0 Processor Exceptions Numbers */
63  Reset_IRQn = -15,
66  SVCall_IRQn = -5,
67  PendSV_IRQn = -2,
68  SysTick_IRQn = -1,
70  /* Interrupt Numbers */
81  PIO0_10_IRQn = 10,
82  RFFIELD_IRQn = 11,
84  NFC_IRQn = 13,
85  RTC_IRQn = 14,
86  I2C0_IRQn = 15,
87  CT16B0_IRQn = 16,
88  PMUFLD_IRQn = 17,
89  CT32B0_IRQn = 18,
90  PMUBOD_IRQn = 19,
91  SSP0_IRQn = 20,
92  TSEN_IRQn = 21,
93  C2D_IRQn = 22,
95  I2D_IRQn = 24,
96  ADCDAC_IRQn = 25,
97  WDT_IRQn = 26,
98  FLASH_IRQn = 27,
99  EEPROM_IRQn = 28,
102  PIO0_IRQn = 31,
104 } IRQn_Type;
105 
106 /* Ignoring -Wsign-conversion in CMSIS (ARM) files */
107 #pragma GCC diagnostic push
108 #pragma GCC diagnostic ignored "-Wsign-conversion"
109 #include "core_cm0plus.h"
110 #pragma GCC diagnostic pop
111 
116 #endif /* __CMSIS_H_ */
Definition: cmsis.h:74
Definition: cmsis.h:67
Definition: cmsis.h:83
Definition: cmsis.h:84
Definition: cmsis.h:73
Definition: cmsis.h:66
Definition: cmsis.h:97
IRQn_Type
Definition: cmsis.h:60
Definition: cmsis.h:63
Definition: cmsis.h:77
Definition: cmsis.h:79
Definition: cmsis.h:78
Definition: cmsis.h:80
Definition: cmsis.h:75
Definition: cmsis.h:88
Definition: cmsis.h:95
Definition: cmsis.h:64
Definition: cmsis.h:76
Definition: cmsis.h:102
Definition: cmsis.h:100
Definition: cmsis.h:68
Definition: cmsis.h:94
Definition: cmsis.h:65
Definition: cmsis.h:92
Definition: cmsis.h:82
Definition: cmsis.h:85
Definition: cmsis.h:90
Definition: cmsis.h:91
Definition: cmsis.h:81
Definition: cmsis.h:71
Definition: cmsis.h:99
Definition: cmsis.h:87
Definition: cmsis.h:89
Definition: cmsis.h:98
Definition: cmsis.h:96
Definition: cmsis.h:101
Definition: cmsis.h:86
Definition: cmsis.h:72
Definition: cmsis.h:93