NHS31xx SW API
flash_nss.h
1 /*
2  * Copyright 2014-2016,2019 NXP
3  * This software is owned or controlled by NXP and may only be used strictly
4  * in accordance with the applicable license terms. By expressly accepting
5  * such terms or by downloading, installing, activating and/or otherwise using
6  * the software, you are agreeing that you have read, and that you agree to
7  * comply with and are bound by, such license terms. If you do not agree to
8  * be bound by the applicable license terms, then you may not retain, install,
9  * activate or otherwise use the software.
10  */
11 
12 #ifndef __FLASH_NSS_H_
13 #define __FLASH_NSS_H_
14 
50 typedef struct NSS_FLASH_S {
51  __IO uint32_t FCTR;
52  __I uint32_t FSTAT;
53  __IO uint32_t FPTR;
54  __I uint32_t RESERVED1; /* next field at offset 0x010 */
55  __IO uint32_t FBWST;
56  __I uint32_t RESERVED2[2]; /* next field at offset 0x01C */
57  __IO uint32_t FCRA;
58  __IO uint32_t FMSSTART;
59  __IO uint32_t FMSSTOP;
60  __I uint32_t FMS16;
61  __I uint32_t FMSW0;
62  __I uint32_t RESERVED3[8]; /* next field at offset 0x050 */
63  __IO uint32_t ECCRSTERRCNT;
64  __I uint32_t ECCERRCNT;
65  __I uint32_t RESERVED4[990]; /* next field at offset 0xFD0 */
66  __I uint32_t MODULE_CONFIG;
67  __I uint32_t RESERVED5; /* next field at offset 0xFD8 */
68  __O uint32_t INT_CLR_ENABLE;
69  __O uint32_t INT_SET_ENABLE;
70  __I uint32_t INT_STATUS;
71  __I uint32_t INT_ENABLE;
72  __O uint32_t INT_CLR_STATUS;
73  __O uint32_t INT_SET_STATUS;
74  __I uint32_t RESERVED6[3]; /* next field at offset 0xFFC */
75  __I uint32_t MODULE_ID;
76 } NSS_FLASH_T;
77 
88 void Chip_Flash_SetHighPowerMode(bool highPower);
89 
95 
106 void Chip_Flash_SetNumWaitStates(int waitStates);
107 
113 
118 #endif /* __FLASH_NSS_H_ */
__I uint32_t FMSW0
Definition: flash_nss.h:61
__O uint32_t INT_CLR_ENABLE
Definition: flash_nss.h:68
__I uint32_t INT_ENABLE
Definition: flash_nss.h:71
Definition: flash_nss.h:50
void Chip_Flash_SetHighPowerMode(bool highPower)
void Chip_Flash_SetNumWaitStates(int waitStates)
__O uint32_t INT_CLR_STATUS
Definition: flash_nss.h:72
__O uint32_t INT_SET_ENABLE
Definition: flash_nss.h:69
#define __IO
Definition: core_cm0plus.h:167
#define __I
Definition: core_cm0plus.h:164
__I uint32_t FMS16
Definition: flash_nss.h:60
__I uint32_t MODULE_CONFIG
Definition: flash_nss.h:66
__IO uint32_t ECCRSTERRCNT
Definition: flash_nss.h:63
__IO uint32_t FCRA
Definition: flash_nss.h:57
__IO uint32_t FCTR
Definition: flash_nss.h:51
__I uint32_t MODULE_ID
Definition: flash_nss.h:75
#define __O
Definition: core_cm0plus.h:166
__O uint32_t INT_SET_STATUS
Definition: flash_nss.h:73
__IO uint32_t FBWST
Definition: flash_nss.h:55
__IO uint32_t FPTR
Definition: flash_nss.h:53
__IO uint32_t FMSSTOP
Definition: flash_nss.h:59
__I uint32_t ECCERRCNT
Definition: flash_nss.h:64
__I uint32_t FSTAT
Definition: flash_nss.h:52
__IO uint32_t FMSSTART
Definition: flash_nss.h:58
bool Chip_Flash_GetHighPowerMode(void)
int Chip_Flash_GetNumWaitStates(void)
__I uint32_t INT_STATUS
Definition: flash_nss.h:70