NHS31xx SW API
gpio: General Purpose Input/Output (GPIO) driver

Detailed Description

The general purpose input/output (GPIO) driver:

  1. selects directions of digital IO pins as inputs or outputs,
  2. configures interrupt events of input pins
  3. sets the states of output pins and gets the state of input pins.

The IOCON driver has to be used to configure the digital IO pins as GPIO. All digital IO pins, in most cases defaults to GPIO function mode at startup and are configured as inputs without interrupt. See IO Configuration driver iocon: IO Configuration driver for details.

The following naming convention is used in this GPIO driver:

  1. Functions named with "Pin", e.g. Chip_GPIO_SetPinDIROutput, influence one specific pin per function call (e.g. '0' for pin 0, '1' for pin 1, etc.). However, the APIs Chip_GPIO_SetPinModeEdge and Chip_GPIO_SetPinModeLevel do not follow this rule and influence a complete port.
  2. Functions named with "Port", e.g. Chip_GPIO_SetPortDIROutput, influence multiple pins as specified with a bitmask (e.g. pin 2 and 3 as (1<<2 | 1<<3), or (NSS_GPIOn_PINMASK(2) | NSS_GPIOn_PINMASK(3)) )
  3. "Pin State" refers to the level (high or low) of individual pin
  4. "Port Value" refers to the OR'ed value of the "pin states" of all digital pins on the port.
To use this driver:
  1. This GPIO driver is initialised with Chip_GPIO_Init and disabled with Chip_GPIO_DeInit
  2. The Pin directions are configured with:
    1. (Individual pin) Chip_GPIO_SetPinDIROutput, Chip_GPIO_SetPinDIRInput, Chip_GPIO_SetPinDIR and
    2. (Port-wide with pin mask) Chip_GPIO_SetPortDIROutput, Chip_GPIO_SetPortDIRInput, Chip_GPIO_SetPortDIR
  3. The Pin direction configurations can be retrieved with:
    1. (Individual pin) Chip_GPIO_GetPinDIR and
    2. (Port-wide with pin mask) Chip_GPIO_GetPortDIR
  4. The Input states are read with:
    1. (Individual pin) Chip_GPIO_GetPinState
    2. (Port-wide with pin mask) Chip_GPIO_GetPortValue
  5. The GPIO interrupts are configured with:
    1. Chip_GPIO_EnableInt, Chip_GPIO_DisableInt, Chip_GPIO_GetEnabledInts and
    2. Chip_GPIO_GetRawInts, Chip_GPIO_GetMaskedInts, Chip_GPIO_ClearInts
    3. Chip_GPIO_SetupPinInt,
    4. Chip_GPIO_SetPinModeEdge, Chip_GPIO_SetPinModeLevel, Chip_GPIO_IsLevelEnabled,
    5. Chip_GPIO_SetEdgeModeBoth, Chip_GPIO_SetEdgeModeSingle, Chip_GPIO_GetEdgeModeDir and
    6. Chip_GPIO_SetModeHigh, Chip_GPIO_SetModeLow, Chip_GPIO_GetModeHighLow
  6. The Output pins are controlled with:
    1. (Individual pin) Chip_GPIO_SetPinOutHigh, Chip_GPIO_SetPinOutLow, Chip_GPIO_SetPinToggle,
    2. (Individual pin) Chip_GPIO_SetPinState, Chip_GPIO_GetPinState,
    3. (Port-wide with pin mask) Chip_GPIO_SetPortOutHigh, Chip_GPIO_SetPortOutLow, Chip_GPIO_SetPortToggle and
    4. (Port-wide with pin mask) Chip_GPIO_SetPortValue, Chip_GPIO_GetPortValue
Example 1 - Configuring individual pins
  • Inputs:
    • Pin 0 with falling edge event interrupt
    • Pin 1 with both falling and rising edge event interrupt
    • Pin 2 with level-sensitive (high) event interrupt
    • Pin 3 without event interrupt
  • Operate Outputs:
    • Pin 4 in High --> Low –> High –> (toggle) –> (toggle) sequence
Interrupt Handler:
/* To be called under interrupt from PIO0_IRQHandler */
uint32_t states = Chip_GPIO_GetRawInts(NSS_GPIO, 0);
if (states & NSS_GPIOn_PINMASK(0)) {
/* Pin 0 falling edge event.
* Further event handling below.
*/
/* ... */
}
if (states & NSS_GPIOn_PINMASK(1)) {
/* Pin 1 falling or rising edge event.
* Further event handling below.
*/
/* ... */
}
if (states & NSS_GPIOn_PINMASK(2)) {
/* Pin 2 active high level-trigger
* Further event handling below.
*/
/* ... */
}
Example 2 - Operate output pin (4, 5, 6, 7) as a group. All other pins shall be inputs
  • Operate Outputs:
    • Pin 4 in High –> Low –> High –> (toggle) –> (toggle) sequence
    • Pin 5 in Low –> High –> Low –> (toggle) –> (toggle) sequence
    • Pin 6 in Low –> High –> Low –> (toggle) –> (toggle) sequence
    • Pin 7 in High –> Low –> High –> (toggle) –> (toggle) sequence

Data Structures

struct  NSS_GPIO_T
 

Macros

#define NSS_GPIOn_PINMASK(x)   (1<<(x))
 

Enumerations

enum  GPIO_INT_MODE_T {
  GPIO_INT_ACTIVE_LOW_LEVEL = 0x0,
  GPIO_INT_ACTIVE_HIGH_LEVEL = 0x1,
  GPIO_INT_FALLING_EDGE = 0x2,
  GPIO_INT_RISING_EDGE = 0x3,
  GPIO_INT_BOTH_EDGES = 0x6
}
 

Functions

void Chip_GPIO_Init (NSS_GPIO_T *pGPIO)
 
void Chip_GPIO_DeInit (NSS_GPIO_T *pGPIO)
 
static void Chip_GPIO_SetPinState (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool setting)
 
static bool Chip_GPIO_GetPinState (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
 
static void Chip_GPIO_SetPinDIROutput (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
 
static void Chip_GPIO_SetPinDIRInput (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
 
void Chip_GPIO_SetPinDIR (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool output)
 
static bool Chip_GPIO_GetPinDIR (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
 
static void Chip_GPIO_SetPortDIROutput (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
 
static void Chip_GPIO_SetPortDIRInput (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
 
void Chip_GPIO_SetPortDIR (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask, bool outSet)
 
static uint32_t Chip_GPIO_GetPortDIR (NSS_GPIO_T *pGPIO, uint8_t port)
 
static void Chip_GPIO_SetPortValue (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t value)
 
static uint32_t Chip_GPIO_GetPortValue (NSS_GPIO_T *pGPIO, uint8_t port)
 
static void Chip_GPIO_SetPortOutHigh (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
 
static void Chip_GPIO_SetPinOutHigh (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
 
static void Chip_GPIO_SetPortOutLow (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
 
static void Chip_GPIO_SetPinOutLow (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
 
static void Chip_GPIO_SetPortToggle (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
 
static void Chip_GPIO_SetPinToggle (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
 
static void Chip_GPIO_SetPinModeEdge (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
static void Chip_GPIO_SetPinModeLevel (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
static uint32_t Chip_GPIO_IsLevelEnabled (NSS_GPIO_T *pGPIO, uint8_t port)
 
static void Chip_GPIO_SetEdgeModeBoth (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
static void Chip_GPIO_SetEdgeModeSingle (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
static uint32_t Chip_GPIO_GetEdgeModeDir (NSS_GPIO_T *pGPIO, uint8_t port)
 
static void Chip_GPIO_SetModeHigh (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
static void Chip_GPIO_SetModeLow (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
static uint32_t Chip_GPIO_GetModeHighLow (NSS_GPIO_T *pGPIO, uint8_t port)
 
static void Chip_GPIO_EnableInt (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
static void Chip_GPIO_DisableInt (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
static uint32_t Chip_GPIO_GetEnabledInts (NSS_GPIO_T *pGPIO, uint8_t port)
 
static uint32_t Chip_GPIO_GetRawInts (NSS_GPIO_T *pGPIO, uint8_t port)
 
static uint32_t Chip_GPIO_GetMaskedInts (NSS_GPIO_T *pGPIO, uint8_t port)
 
static void Chip_GPIO_ClearInts (NSS_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
 
void Chip_GPIO_SetupPinInt (NSS_GPIO_T *pGPIO, uint8_t port, uint8_t pin, GPIO_INT_MODE_T mode)
 

Data Structure Documentation

◆ NSS_GPIO_T

struct NSS_GPIO_T

GPIO port register block structure

Data Fields
__IO uint32_t DATA[4096]

Offset: 0x0000 to 0x3FFC Data address masking register (R/W)

uint32_t RESERVED1[4096]
__IO uint32_t DIR

Offset: 0x8000 Data direction register (R/W)

__IO uint32_t IS

Offset: 0x8004 Interrupt sense register (R/W)

__IO uint32_t IBE

Offset: 0x8008 Interrupt both edges register (R/W)

__IO uint32_t IEV

Offset: 0x800C Interrupt event register (R/W)

__IO uint32_t IE

Offset: 0x8010 Interrupt mask register (R/W)

__I uint32_t RIS

Offset: 0x8014 Raw interrupt status register (R)

__I uint32_t MIS

Offset: 0x8018 Masked interrupt status register (R)

__O uint32_t IC

Offset: 0x801C Interrupt clear register (W)

uint32_t RESERVED2[8184]

Macro Definition Documentation

◆ NSS_GPIOn_PINMASK

#define NSS_GPIOn_PINMASK (   x)    (1<<(x))

Pin x mask definition

Enumeration Type Documentation

◆ GPIO_INT_MODE_T

GPIO interrupt mode definitions

Enumerator
GPIO_INT_ACTIVE_LOW_LEVEL 

Selects interrupt on pin to be triggered on LOW level

GPIO_INT_ACTIVE_HIGH_LEVEL 

Selects interrupt on pin to be triggered on HIGH level

GPIO_INT_FALLING_EDGE 

Selects interrupt on pin to be triggered on FALLING level

GPIO_INT_RISING_EDGE 

Selects interrupt on pin to be triggered on RISING level

GPIO_INT_BOTH_EDGES 

Selects interrupt on pin to be triggered on both edges

Function Documentation

◆ Chip_GPIO_Init()

void Chip_GPIO_Init ( NSS_GPIO_T pGPIO)

Initialise GPIO block

Parameters
pGPIO: The base address of GPIO peripheral on the chip

◆ Chip_GPIO_DeInit()

void Chip_GPIO_DeInit ( NSS_GPIO_T pGPIO)

De-Initialise GPIO block

Parameters
pGPIO: The base address of GPIO peripheral on the chip

◆ Chip_GPIO_SetPinState()

static void Chip_GPIO_SetPinState ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin,
bool  setting 
)
inlinestatic

Set a GPIO pin state via the GPIO byte register

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: GPIO pin to set
setting: true for setting pin to high, false for low

◆ Chip_GPIO_GetPinState()

static bool Chip_GPIO_GetPinState ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin 
)
inlinestatic

Get a GPIO pin state via the GPIO byte register

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: GPIO pin to get state for
Returns
true if the GPIO pin is high, false if low

◆ Chip_GPIO_SetPinDIROutput()

static void Chip_GPIO_SetPinDIROutput ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin 
)
inlinestatic

Set GPIO direction for a single GPIO pin to an output

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: GPIO pin to set direction as output

◆ Chip_GPIO_SetPinDIRInput()

static void Chip_GPIO_SetPinDIRInput ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin 
)
inlinestatic

Set GPIO direction for a single GPIO pin to an input

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: GPIO pin to set direction as input

◆ Chip_GPIO_SetPinDIR()

void Chip_GPIO_SetPinDIR ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin,
bool  output 
)

Set GPIO direction for a single GPIO pin

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: GPIO pin to set direction for
output: true for setting as output, false for input

◆ Chip_GPIO_GetPinDIR()

static bool Chip_GPIO_GetPinDIR ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin 
)
inlinestatic

Get GPIO direction for a single GPIO pin

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: GPIO pin to get direction for
Returns
true if the GPIO pin is set as an output, false for input

◆ Chip_GPIO_SetPortDIROutput()

static void Chip_GPIO_SetPortDIROutput ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinMask 
)
inlinestatic

Set GPIO direction for all selected GPIO pins to an output

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinMask: GPIO pin mask to set direction on as output (ORed value of bits 0..11 for pins 0..11)
Note
Sets multiple GPIO pins to the output direction. Each bit's position that is high, sets the corresponding pin number for that bit to an output.

◆ Chip_GPIO_SetPortDIRInput()

static void Chip_GPIO_SetPortDIRInput ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinMask 
)
inlinestatic

Set GPIO direction for all selected GPIO pins to an input

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinMask: GPIO pin mask to set direction on as input (ORed value of bits 0..11 for pins 0..11)
Note
Sets multiple GPIO pins to the input direction. Each bit's position that is high, sets the corresponding pin number for that bit to an input.

◆ Chip_GPIO_SetPortDIR()

void Chip_GPIO_SetPortDIR ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinMask,
bool  outSet 
)

Set GPIO direction for all selected GPIO pins to an input or output

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinMask: GPIO pin mask to set direction on (ORed value of bits 0..11 for pins 0..11)
outSet: Direction value. Use false to set as inputs and true to set as outputs
Note
Sets multiple GPIO pins to input/output direction. If the bit is high, then the corresponding pin is set to output. Similarly, if the bit is low, then the corresponding pin is set as input.

◆ Chip_GPIO_GetPortDIR()

static uint32_t Chip_GPIO_GetPortDIR ( NSS_GPIO_T pGPIO,
uint8_t  port 
)
inlinestatic

Get GPIO direction for all GPIO pins

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
Returns
a bit-field containing the input and output direction setting for each pin
Note
For pins 0..11, a high in a bit corresponds to an output direction for the same pin, while a low corresponds to an input direction.

◆ Chip_GPIO_SetPortValue()

static void Chip_GPIO_SetPortValue ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  value 
)
inlinestatic

Set all GPIO raw pin states as a group

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
value: A 12-bit value to set all GPIO pin states (0..11) to

◆ Chip_GPIO_GetPortValue()

static uint32_t Chip_GPIO_GetPortValue ( NSS_GPIO_T pGPIO,
uint8_t  port 
)
inlinestatic

Get all GPIO raw pin states as a group

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
Returns
Current (raw) state of all GPIO pins (0..11)

◆ Chip_GPIO_SetPortOutHigh()

static void Chip_GPIO_SetPortOutHigh ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinMask 
)
inlinestatic

Set selected GPIO output pins to the high state

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinMask: A pin mask to select pins to be set as high (ORed value of bits 0..11 for pins 0..11)
Note
Any bit set as a '0' will not have it's state changed. Setting the state only applies to pins configured as an output.

◆ Chip_GPIO_SetPinOutHigh()

static void Chip_GPIO_SetPinOutHigh ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin 
)
inlinestatic

Set an individual GPIO output pin to the high state

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: pin number (0..11) to be set high
Note
Setting the state only applies to pins configured as an output.

◆ Chip_GPIO_SetPortOutLow()

static void Chip_GPIO_SetPortOutLow ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinMask 
)
inlinestatic

Set selected GPIO output pins to the low state

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinMask: A pin mask to select pin to be set as low (ORed value of bits 0..11 for pins 0..11)
Note
Any bit set as a '0' will not have it's state changed. Setting the state only applies to pins configured as an output.

◆ Chip_GPIO_SetPinOutLow()

static void Chip_GPIO_SetPinOutLow ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin 
)
inlinestatic

Set an individual GPIO output pin to the low state

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: pin number (0..11) to set low
Note
Setting the state only applies to pins configured as an output.

◆ Chip_GPIO_SetPortToggle()

static void Chip_GPIO_SetPortToggle ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinMask 
)
inlinestatic

Toggle selected GPIO output pins to the opposite state

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinMask: A pin mask to select pins to be toggled (ORed value of bits 0..11 for pins 0..11)
Note
Any bit set as a '0' will not have it's state changed. Toggling the state only applies to pins configured as an output.

◆ Chip_GPIO_SetPinToggle()

static void Chip_GPIO_SetPinToggle ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin 
)
inlinestatic

Toggle an individual GPIO output pin to the opposite state

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: pin number (0..11) to toggle
Note
Toggling the state only applies to pins configured as an output.

◆ Chip_GPIO_SetPinModeEdge()

static void Chip_GPIO_SetPinModeEdge ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Configure the pins as edge sensitive for interrupts

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins to be set to edge trigger mode (ORed value of bits 0..11)

◆ Chip_GPIO_SetPinModeLevel()

static void Chip_GPIO_SetPinModeLevel ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Configure the pins as level sensitive for interrupts

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins to be set to level trigger mode (ORed value of bits 0..11)

◆ Chip_GPIO_IsLevelEnabled()

static uint32_t Chip_GPIO_IsLevelEnabled ( NSS_GPIO_T pGPIO,
uint8_t  port 
)
inlinestatic

Returns current GPIO edge or high level interrupt configuration for all pins of a port

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
Returns
A bit-field containing the edge/level interrupt configuration for each pin for the selected port. Bit 0 corresponds to pin 0, 1 to pin 1. and so on. For each bit, a 0 means the edge interrupt is configured, while a 1 means a level interrupt is configured. Mask with this return value to determine the edge/level configuration for each pin in a port.

◆ Chip_GPIO_SetEdgeModeBoth()

static void Chip_GPIO_SetEdgeModeBoth ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Sets GPIO interrupt configuration for both edges for selected pins

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins to be set to dual edge trigger mode (ORed value of bits 0..11)

◆ Chip_GPIO_SetEdgeModeSingle()

static void Chip_GPIO_SetEdgeModeSingle ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Sets GPIO interrupt configuration for a single edge for selected pins

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins to be set to single edge trigger mode (ORed value of bits 0..11)

◆ Chip_GPIO_GetEdgeModeDir()

static uint32_t Chip_GPIO_GetEdgeModeDir ( NSS_GPIO_T pGPIO,
uint8_t  port 
)
inlinestatic

Returns current GPIO interrupt single or dual edge configuration for all pins of a port

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
Returns
A bit-field containing the single/dual edge interrupt configuration for each pin for the selected port. Bit 0 corresponds to pin 0, 1 to pin 1. and so on. For each bit, a 0 means the interrupt triggers on a single edge (use the Chip_GPIO_SetEdgeModeHigh() and Chip_GPIO_SetEdgeModeLow() functions to configure selected edge), while a 1 means the interrupt triggers on both edges. Mask with this return value to determine the edge/level configuration for each pin in a port.

◆ Chip_GPIO_SetModeHigh()

static void Chip_GPIO_SetModeHigh ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Sets GPIO interrupt configuration, when in single edge or level mode to trigger on high edge or high level

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins to be set to high mode (ORed value of bits 0..11)
Note
Use this function to select high level or high edge interrupt mode for the selected pins on the selected port when not in dual edge mode.

◆ Chip_GPIO_SetModeLow()

static void Chip_GPIO_SetModeLow ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Sets GPIO interrupt configuration, when in single edge or level mode to trigger on low edge or low level

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins to be set to low mode (ORed value of bits 0..11)
Note
Use this function to select low level or low edge interrupt mode for the selected pins on the selected port when not in dual edge mode.

◆ Chip_GPIO_GetModeHighLow()

static uint32_t Chip_GPIO_GetModeHighLow ( NSS_GPIO_T pGPIO,
uint8_t  port 
)
inlinestatic

Returns current GPIO interrupt edge direction or level mode

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
Returns
A bit-field containing the low or high direction of the interrupt configuration for each pin for the selected port. Bit 0 corresponds to pin 0, 1 to pin 1. and so on. For each bit, a 0 means the interrupt triggers on a low level or edge, while a 1 means the interrupt triggers on a high level or edge. Mask with this return value to determine the high/low configuration for each pin in a port.

◆ Chip_GPIO_EnableInt()

static void Chip_GPIO_EnableInt ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Enables interrupts for selected pins on a port

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins to enable interrupts on (ORed value of bits 0..11)

◆ Chip_GPIO_DisableInt()

static void Chip_GPIO_DisableInt ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Disables interrupts for selected pins on a port

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins to disable interrupts on (ORed value of bits 0..11)

◆ Chip_GPIO_GetEnabledInts()

static uint32_t Chip_GPIO_GetEnabledInts ( NSS_GPIO_T pGPIO,
uint8_t  port 
)
inlinestatic

Returns current interrupt enabled pins for a port

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
Returns
A bit-field containing the enabled pin interrupts (0..11)

◆ Chip_GPIO_GetRawInts()

static uint32_t Chip_GPIO_GetRawInts ( NSS_GPIO_T pGPIO,
uint8_t  port 
)
inlinestatic

Returns raw interrupt pending status for all pins for a port

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
Returns
A bit-field containing the pending raw interrupt states for each pin (0..11) on the port

◆ Chip_GPIO_GetMaskedInts()

static uint32_t Chip_GPIO_GetMaskedInts ( NSS_GPIO_T pGPIO,
uint8_t  port 
)
inlinestatic

Returns masked interrupt pending status for all pins for a port

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
Returns
A bit-field containing the pending masked interrupt states for each pin (0..11) on the port

◆ Chip_GPIO_ClearInts()

static void Chip_GPIO_ClearInts ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint32_t  pinmask 
)
inlinestatic

Clears pending interrupts for selected pins for a port

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pinmask: A pin mask to select pins on to clear interrupts on (ORed value of bits 0..11)

◆ Chip_GPIO_SetupPinInt()

void Chip_GPIO_SetupPinInt ( NSS_GPIO_T pGPIO,
uint8_t  port,
uint8_t  pin,
GPIO_INT_MODE_T  mode 
)

Composite function for setting up a full interrupt configuration for a single pin

Parameters
pGPIO: The base address of GPIO peripheral on the chip
port: Port number
pin: Pin number (0..11)
mode: GPIO interrupt mode selection